1. Field of the Invention
The present invention relates to a semiconductor device having a vertical MOS transistor with a trench structure and a method of manufacturing the semiconductor device.
2. Description of the Related Art
In recent years, power supply ICs represented by voltage regulators and voltage detectors tend to be smaller in chip size and larger in output current to keep up with the size reduction and diversification of portable devices to which the power supply ICs are mounted. Since a driver element for driving a current occupies the chip area most within elements constituting a power supply IC, MOS transistors having a trench structure have been employed so far in an attempt to enhance the driving performance of the driver element through reduction in area and increase in the effective channel width.
Up to now, semiconductor devices having a trench structure and methods of manufacturing the semiconductor devices have been introduced in, for example, JP 10-32331 A and JP 2008-34794 A.
A conventional method of manufacturing a vertical MOS transistor having a trench structure is described with reference to FIGS. 4A to 5D. FIGS. 4A to 5D are schematic sectional views illustrating step by step the flow of the manufacturing method.
First, as illustrated in FIG. 4A, a first conductivity type well diffusion layer 22 (called a body) is formed on a second conductivity type embedded layer 21. A thermally oxidized film 23, a deposited oxide film 24, and a resist film 25 are stacked on a surface of the body and are partially etched away.
Next, as illustrated in FIG. 4B, the resist film 25 is removed and then a hard mask which is a laminate of the patterned thermally oxidized film 23 and deposited oxide film 24 is used to form a trench 26 by etching. Subsequently, as illustrated in FIG. 4C, the thermally oxidized film 23 and the deposited oxide film 24 which have been used as the hard mask are removed and then a sacrificial oxide film 27 is formed by thermal oxidation in order to improve the shape of the trench 26.
Thereafter, as illustrated in FIG. 4D, removing the sacrificial oxide film 27, a gate insulating film 28 is formed by thermal oxidation, and a doped polycrystalline silicon film 29 which contains impurities formed by deposition.
Next, as illustrated in FIG. 5A, a resist film 31 is used in patterning and a gate electrode 30 is obtained by over-etching the doped polycrystalline silicon film 29.
Thereafter, as illustrated in FIG. 5B, a resist film 32 is patterned and the exposed surface is doped with second conductivity type impurities in order to form a source region. Subsequently, as illustrated in FIG. 5C, a resist film 33 is newly patterned and the exposed surface is doped with first conductivity type impurities in order to form a substrate-potential region.
Thereafter, as illustrated in FIG. 5D, a second conductivity type heavily doped source diffusion layer 34 and a first conductivity type heavily doped substrate-potential diffusion layer 35 are formed by heat treatment. An interlayer insulating film 36 is subsequently formed by deposition, and then contact holes 37 are formed to establish electrical connection to the gate electrode 30, the second conductivity type heavily doped source diffusion layer 34, and the first conductivity type heavily doped substrate-potential diffusion layer 35. Plugs made of tungsten or the like are then embedded to form source substrate-potential wiring 39 and gate-potential wiring 38.
An element structure that has the trench 26 formed in the first conductivity type well diffusion layer 22 is thus formed as a vertical MOS transistor having a trench structure which operates in the vertical direction.
However, the conventional semiconductor device manufacturing method described above has a problem in that, when the contact holes are provided in the gate electrode led out of the trench of the vertical MOS transistor having a trench structure, a current does not flow in a part of the element because a heavily doped diffusion layer is not formed in the substrate right under the gate electrode.